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Baseband Module Reduces Multisite Test Costs |
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Testing transceiver and converter interfaces requires orthogonal in-phase and quadrature (IQ) analog signals; that is, the phase relationship of the two must be very close to a 90-degree phase offset, and their relative amplitudes must be balanced.
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In-House Manufacturing Remains a Core Competency at Advantest |
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While most of the automated test equipment (ATE) market has shifted to outsourced manufacturing, Advantest steadfastly relies on its own in-house manufacturing, assembly and qualification in Japan's Gunma Prefecture.
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Demand Spikes for Multi-Site Testing |
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Multi-site testing of SoC devices is now emerging as a major trend to drive down the cost of test. Test vendors also are developing adaptive testing: leveraging the previous test results from a device as it goes through various test steps.
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Breaking the Barriers to RF Multi-DUT Tests |
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Because test companies have reduced test time to the bare minimum, and many chipmakers have reduced capital expenditures in favor of intelligent use of equipment and approaches, the last dimension to be addressed is multi-DUT testing.
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E-Beam Technology Breaks Through Complex Design Cycles |
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Rising fabrication costs and increasingly complex design cycles are making electron-beam direct write (EBDW) more appealing for an expanding range of applications, including prototyping and ASIC production.
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Advantest Boosts Tested Multichip Packages per Hour |
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Advantest Corp. (Tokyo) has developed two new memory testers designed for multichip package (MCP) memory applications; T5781 MCP tester and B2510 burn-in wafer tester for known good die (KGD). The company demonstrated both testers with test handlers at its private show.
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Navigating the Outsourcing Options |
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Manufacturing outsourcing isn’t a new concept for the semiconductor industry. Over the past decade, companies up and down the supply chain have adopted outsourcing in various degrees to help offset costs and increase productivity. Recognizing the benefits and potential ramifications of outsourcing and picking the right balance for your company is a matter of strategy.
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Reducing EVM Test Time And Identifying Failure Mechanisms |
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Error vector magnitude (EVM) is slowly becoming a mainstream production test. The reason? New and emerging standards utilizing complex digital modulation will require a system-level test to ensure all radios are on and functioning properly. Older ATE architectures using conventional methods required 5x to 10x more EVM test time than traditional parametric tests, which was the key factor postponing it from becoming a mainstream production test.
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MIMO challenges existing ATE |
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You can often adapt existing test systems for new devices, but with MIMO, this approach may not suffice.
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Ultrawideband SoCs pose new challenges to manufacturers |
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What do these three killer wireless applications have in common: Viewing HDTV on a mobile device using 4G WiMax technologies; using existing WLAN infrastructure to make phone calls; and using ultrawideband (UWB) technology to download or print pictures from a digital camera?
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Open ATE: An Architecture for the Future |
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For years analysts have been saying the semiconductor test industry is too small to support the current number of automatic test equipment (ATE) vendors. Profitability of ATE vendors, as a group, has been minimal. Customers are looking for the next big cost-of-test-reduction project. Consolidation from today’s 25-30 proprietary testers to two or three open architecture testers would substantially reduce the industry’s overall costs to develop new test capabilities. It’s time to go to the next level in industry collaboration.
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Evolutionary Changes for RF Device Testing |
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In the cellular space, convergence of services continues to occur at an accelerated rate. Consumer service providers and product manufacturers are releasing an abundance of new products that crossover between the PC and handset markets. Take, for example, some recent announcements from industry leaders like Cingular in the infrastructure market and Samsung and Nokia from the handset market. Notice that the directions of their new products stray away from their mainstream past.
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Get Higher ATE Throughput – at Lower Costs |
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Despite the proliferation of BIST and DFT techniques, the handler is now the critical element in testing success.
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For SIPs, Concurrent RF Testing Delivers Advantages in Cost-of-Test and Quality of Results |
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What is concurrent RF testing and why does it matter? Concurrent testing is generally thought of as simultaneously testing various circuit blocks on the same device in order to both speed your test execution as well as more realistically communicate with the device under test (DUT). Traditionally speaking, if you had two or more cores and could access them independently, you could test them concurrently and significantly reduce your test time. The same applies to RF testing, although it requires the right set of instruments and a little forethought.
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A Model for Determining ATE Cost of Ownership |
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In the competitive arena that defines semiconductor automatic test equipment (ATE) decision making and selection, once equipment is proven to be technically capable of providing the necessary test coverage for a customer’s device, the critical deciding factor becomes the equipment’s cost of ownership (CoO). Since there may be more than one technically viable solution, equipment selection is most often determined by CoO. Technical differentiation does, of course, exist. However, now more than ever, technical differentiators are revealed in the form of cost advantages, rather than a simple ability vs. inability to test the part.
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Modern SoC Handlers With Advanced Technology Lower Test Cost of Ownership |
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Handlers, especially pick-and-place handlers used for testing of today’s complex SoC packages, are playing an increasingly important role in test cost of ownership (CoO) |
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