Market Leader to Exhibit Newest IC Test Solutions and Participate in Technical Program
SAN JOSE, Calif. - October 24, 2017 - Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) will demonstrate hardware and online test solutions and participate in the technical program with paper and poster contributions at the 2017 International Test Conference (ITC), October 31-November 2, in Fort Worth, Texas.
Advantest is also proud to be a continuing Platinum-level corporate supporter of ITC.
Products Featured in the Booth
The first-of-its-kind CloudTesting Service allows users to access various Test Method (IP) selections whenever needed from the web site. Using this on-demand online service, designers can verify their new silicon at a very low cost with no capital investment, set up their own test environment within a few hours and be ready to test when the device arrives from the fab. At ITC, visitors to the booth can see the desktop test station with a live demonstration of how fast a device can be verified with STIL-generated DFT patterns. With free tester leasing and minimum maintenance costs, Advantest's CloudTesting Service allows customers to avoid unplanned expenses.
Advantest's EVA100 analog/mixed-signal test solution combines a modular architecture with high-voltage and high-precision analog parametric measurement units, providing the flexibility to conduct various measurements over a broad range of analog and mixed-signal devices. The latest model in the EVA100 product family includes an integrated servo-loop function that delivers the industry's fastest test time and high precision. Its 18-bit AD-converter characterization has 20bit linearity DC performance and ultra-low drift/noise source and VREF. Coupled with a GUI that is highly intuitive, users are able to minimize the time to market for their newest ICs.
In addition to product exhibits, Advantest experts will present latest technology within ITC's renowned technical program.
On Tuesday, October 31, at 1:30pm during the Corporate Forum, Advantest's A.T Sivaram will present, "CloudTesting Service Simulator Interfaces." On Wednesday, November 1 at 8:30am, Advantest's Bob Bartlett will chair Session 4 on "Dealing with Jitter and Leveraging Light," and during that session at 9:30am, Advantest's Masahiro Ishida and Kiyotaka Ichiyama will present their paper, "A Jitter Separation and BER Estimation Method for Asymmetric Total Jitter Distributions." At 10:30am that same day, Don Blair will chair Session 8 on "Interfaces, iJTAG and DDR Testing."
Also on Wednesday, at ITC's Poster Session, from 12:00 to 2:00pm, Advantest will present new technologies in Poster 1 and Poster 2, as noted below:
PO.1: Multisite PMIC Fast Trimming with Pattern-based Search Function, by Kevin Fan, Advantest
PO.2: Delay Fault Testing Using Cloud Testing Service, by A.T Sivaram, Oyama Yasuji, Advantest, and Sam El Alam, Arul Subbarayan (Qualcomm, USA)
The latest information from Advantest is available on Twitter @Advantest_ATE.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.