| Title | No. |
| Low-profile Water-cooled Cold Plate | No.61 |
| Improvement of High-Gradation DDIC Device Test Yield by T6391 High-Accuracy Measurement Solution | No.61 |
| Breakthrough for Test Cost Reduction on MicroLED Device with Electric-Luminescence and Electrical Test Embedded Solution | No.60 |
| Development of control system “HC-X” for inteXcell(MC5041) | No.60 |
| Functional HSIO-Scan and SW-based functional test enabled by V93000 Link Scale™ | No.60 |
| Software Execution Time Reduced by New Tester-per-Site Architecture Using High-performance CPU | No.59 |
| Test cost reduction according to Adaptive Probe Cleaning | No.59 |
| 16 Gbaud PAM3 V93000 BOST solution for GDDR7 | No.59 |
| Accelerate the Test Program Development and Contribute to the TAT Reduction using T2000 RDK | No.59 |
| Open-short Normalization Method for a Quick Defect Identification in Branched Traces with High-resolution Time-domain Reflectometry | No.58 |
| GaN 8Gbps High-Speed Relay MMIC for Automated Test Equipment | No.58 |
| The development of front-end module for 5G millimeter-wave device testing | No.58 |
| Development / mass production TAT shortening method through emulation of image sensor device | No.58 |
| High-speed measurement of Piezoelectric MEMS equivalent circuit parameters by Swept-sine and PRBS signals | No.57 |
| Over-the-Air (OTA) Test Socket and Handler Integration Technology for 5G Mass Production Testing | No.57 |
| An MCU+Wi-Fi (802.11n) EVM measurement method with correction of IQ skew imbalance | No.57 |
| Development of High Voltage General-purpose Pin-Electronics | No.56 |
| High-speed Image Processing by GPU | No.56 |
| A novel memory test system with an electromagnet for STT-MRAM testing | No.55 |
| Development of digital controlled technology for high voltage DC testing | No.55 |
| Metrology at Automated Test Equipment Manufacturers | No.55 |
| Development of an Air-Cooling Active Thermal Control Function for M4841 | No.55 |
| Development of a CMOS Image Sensor Capture Module for MIPI D-PHY/C-PHY | No.55 |
| Generation of C-PHY signals and UI jitter with 8GDM | No.55 |
| Mass Production Program Automatic Optimization | No.54 |
| A Review of Combiner/Divider PCB Design Topologies For 5G and WiGig ATE Applications | No.53 |
| A Jitter Injection Module for Production Test of 52-Gbps PAM4 Signal Interfaces | No.53 |
| Mass production technology of MEMS sensor with ATE | No.53 |
| Test cell solution for reducing thermal spikes in semiconductor device testing | No.52 |
| Verizon 5G: Test challenges for next generation of mmWave communications using V93000 WaveScale RF | No.52 |
| Test Time Analysis & Optimization on SmarTest8 | No.52 |
| Development of high-voltage, high-current floating module with a maximum of 320 V and 18 channels | No.52 |
| A Stressed Eye Testing Module for Production Test of 30-Gbps NRZ Signal Interfaces | No.51 |
| Accurate error bit mode analysis of STT-MRAM chip with a novel current measurement module implemented to gigabit class memory test system | No.51 |
| New Thermal Technology for a New Burn-in Test System | No.51 |
| T2000 IPS + GPWGD: a Measurement Technique with Ultra-High Dynamic Range for Hi-Res Audio | No.51 |
| Delay Fault Testing Using CloudTesting™ Services | No.50 |
| A multiple simultaneous measurement technique for UHF tag RF I/F using a digital module | No.50 |
| A New Method for Measuring Alias-Free Aperture Jitter in an ADC Output | No.49 |
| A Jitter Separation and BER Estimation Method for Asymmetric Total Jitter Distributions | No.49 |
| Jitter Measurement Using a V93000 Time Measurement Unit (TMU) and Taking into Account the Jitter Transfer Function | No.49 |
| Novel Crosstalk Evaluation Method for High-Density Signal Traces Using Clock Waveform Conversion Technique. | No.48 |
| Power Supply Impedance Emulation to Eliminate Overkills and Underkills due to the Impedance Difference between ATE and Customer Board | No.48 |
| An Optical Interconnection Test Method Applicable to 100-Gb/s Transceivers using an ATE based Hardware | No.48 |
| The elemental technologies for multi-site test of RF IC by V93000 | No.48 |
| M4871/72 temperature control solution for High-Power Device | No.48 |
| Known-Good-Die Test Methods for Large, Thin, High-Power Digital Devices | No.47 |
| ADC Linearity Measurement by Using Servo Method on the EVA100 | No.47 |
| High Speed and high precision ADC tests using the High Frequency AWG/DGT module of the EVA100 test system | No.47 |
| A Technique for Analyzing On-chip Power Supply Impedance | No.46 |
| Method of device power regulation by PRM™ (Power Regulation Module) | No.46 |
| High speed Linearity Measurement for 14bit ADC by High Speed Linear Ramp generator on EVA100 | No.46 |
| Development of optical functional devices using epitaxially grown lanthanum-modified lead zirconate titanate films | No.45 |
| An ATE System for Testing 2.4-GHz RF Digital Communication Devices with QAM Signal Interfaces | No.45 |
| Development of high accuracy vision alignment function for the test handler | No.45 |
| Test Program Generation Environment for Analog Device Test on T2000. | No.45 |
| Statistical Silicon Results of Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills | No.44 |
| An ATE Based 32 Gbaud PAM-4 At-Speed Characterization and Testing Solution | No.44 |
| Embodiment of Efficient Test Program Development Environment in T2000 | No.44 |
| Development of Device Interface and Probe Card for Image Sensor Tests to achieve 3Gbps Data Transmission | No.44 |
| Development DC test technology with high additional value adopting digital controlled technology | No.43 |
| Advanced Method to Refine Waveform Smeared by Jitter in Waveform Sampler Measurement | No.43 |
| 30-Gb/s Optical and Electrical Test Solution for High-Volume Testing | No.42 |
| A New Method for Off-Chip or On-Die Timing Noise Measurement | No.42 |
| Time to Market Reduction from Pre-/Post-Silicon Verification to Production on ATE | No.42 |
| Why Next-Generation NAND Flash Requires a Dedicated Test Solution | No.42 |
| Power Integrity Control of ATE for Emulating Power Supply Fluctuations on Customer Environment | No.41 |
| Low Cost Test Method for RF Communication Devices Using Equivalent EVM Approach | No.41 |
| Test technology of CMOS image sensor device | No.41 |
| Multi-Domain Test - A New Test Strategy to Reduce the Cost of Test | No.41 |
| 8Gbps CMOS Pin Electronics Hardware Macro with Simultaneous Bi-directional Capability | No.40 |
| RNA: Advanced Phase Tracking Method for Digital Waveform Reconstruction | No.40 |
| ECOTsTM the Evolutionary Factory Automation tool | No.40 |
| High Efficiency Massive Parallel Test Capability of T2000 Integrated Massive Parallel test solution | No.40 |
| Addressing the Challenges of 3D IC Package Handling for Automated Test | No.40 |
| VPCS "Vacuum probe contact system" | No.39 |
| Elegant Construction of SSC Implemented Signal by AWG And Organized Under-sampling of Wideband Signal | No.39 |
| Development of termination voltage amplifier for 10Gbps CML PE-Driver | No.39 |
| Development of wide band range, High-density and High-speed Transmission Connector for HIFIX | No.39 |
| Low COT Tester Technology for Memory Core Testing | No.39 |
| Test technology of IGBT on T2000 | No.39 |
| The performance of T5511 Timing-Training hardware | No.39 |
| Test Technology Enabling Multiple-Device Parallel Testing of Motion Sensors | No.39 |
| Real-Time Testing Method for 16 Gbps 4-PAM Signal Interface | No.38 |
| Dedicated Nand Flash Memory Tester Technology With New Concept | No.38 |
| Development of an ATE Test Cell for At-Speed Characterization and Production Testing | No.38 |
Semiconductor testing