Test Industry Market Leader to Feature Prominently in ITC’s Acclaimed Technical Program and Virtual Exhibit
TOKYO, Japan – October 29, 2020 – Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) will preview its latest hardware, software and cloud test solutions at the International Test Conference (ITC), and will contribute to the technical program with virtual presentations and a novel technical paper. ITC, formerly scheduled to take place in Washington, D.C., will take place virtually on November 3-5 (EST).
Advantest is once again a platinum-level corporate supporter of ITC as well as a sponsor of the Test Technology Technical Council’s (TTTC) 3D & Chiplet Test Workshop and Automotive Reliability and Test Workshop, both taking place virtually on November 5-6, following the close of the conference.
In its virtual booth, Advantest will feature its new V90000 EXA Scale™ SoC Test System, capable of testing digital ICs up to the exascale performance class and other devices. The system’s new test heads incorporate Xtreme Link™ technology, and the EXA Scale universal digital and power supply cards enable new test methodologies, lower cost of test, and faster time-to-market.
Advantest will also demonstrate how it is adding customer value in an evolving semiconductor value chain through broadening its business domain with new partnerships and acquisitions, including system level test, cloud analytics, and test-related accessories.
In addition to the virtual exhibit, on Wednesday, November 4 at 15:00 ET, Advantest’s Ira Leventhal will deliver a presentation on Solving Semiconductor Test Challenges in the 5G/Exascale Era. And, on Thursday, November 5 at 13:00 ET in Track D-P2, Advantest’s experts will discuss a deep learning application for the detection of defective tester sockets. The methodology relies on images like those used for manual inspection and represents a practical example of the use of machine learning for achieving improved inspection-quality outcomes at lower cost. The paper is titled, Automated Socket Anomaly Detection through Deep Learning, and is authored by Nidhi Agrawal, ConstantinosXanthopoulos, Vijay Thangamariappan, Joe Xiao, Chee-Wah Ho, Keith Schaub and Ira Leventhal.
Following the close of ITC’s technical program on Thursday, the 3DC-TEST Workshop will commence with Advantest’s Dave Armstrong serving as a panelist at this prescient event. Since this year’s workshop covers testing of three-dimensional, chiplet-based, and stacked ICs, the 3D TEST workshop has been redubbed the 3DC-TEST Workshop (with an extra letter “C” for “chiplet”).
More information about ITC can be found at: http://www.itctestweek.org/
The latest information from Advantest is available on Twitter @Advantest_ATE.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.