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2016-08-09 08:00:00.0 Topics

Versatile Testers Meet the Needs of Manufacturers Addressing the Expanding Market for Protocol-Based Storage Applications

SAN JOSE, Calif. – August 9, 2016 – Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) will showcase two multi-protocol systems for testing advanced storage devices at the chip, module and system level at the Flash Memory Summit on August 9-11 in Santa Clara, Calif. Advantest is an emerald sponsor of this year’s 11th annual Summit.

In booths #606-608 in Hall B of the Santa Clara Convention Center, Advantest will highlight its new MPT3000HVM system, designed to achieve the lowest cost in high-volume testing of solid-state drives (SSDs). It is the industry’s first true multi-protocol SSD test solution and can support multiple form factors as well, making it the most versatile, modular and scalable SSD tester on the market. Downloadable firmware enables the MPT3000HVM to test any major protocol including SAS 12G, SATA 6G and PCIe with NVMe or AHCI. In addition, Stylus™ software makes the system easy to use and gives it the capability to be used in both engineering and production environments.

Advantest’s T5851 is capable of performing high-volume testing, as well as reliability and qualification testing, of protocol NAND devices. Based on the T5800 platform that has been adopted by several memory integrated device manufacturers (IDMs) and outsourced semiconductor assembly and test (OSAT) companies, the flexible T5851 system can be configured for high-volume production and test up to 768 devices in parallel by matching it with an automated component handler such as Advantest’s M624x series handler. Like the MPT3000 platform, it provides multi-protocol support in one tool for high-performance universal flash storage (UFS) devices and PCIe BGA SSDs. T5851 units with x512 and x768 parallel-testing configurations are now being shipped to customers.

Both the MPT3000HVM and the T5851 system-level test solutions use a tester-per-DUT architecture and proprietary hardware accelerator to deliver the fastest test times in the industry. Additionally, they leverage the same FPGA multi-protocol architecture, minimizing customers’ capital investments and deployment risks.

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Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.