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2009-12-08 00:00:00.0 Topics

Highly-parallel, multi-site, T2000 SoC test platform offers cost effective solution and gives Bay Area fabless companies a path to volume production

SANTA CLARA, Calif., December 7, 2009 -- Advantest Corporation (TSE: 6857, NYSE: ATE), global leader in automatic test equipment (ATE) solutions to the semiconductor industry, today announced that STATS ChipPAC Ltd. (SGX-ST: STATSChP), a leading semiconductor test and advanced packaging service provider, has installed a T2000 SoC test system in its facility in Milpitas, California. The installation is part of an expanding global partnership between the two companies. Advantest’s T2000 SoC test platform offers the industry’s highest levels of multi-site and parallel testing capabilities, helping to speed time-to-volume economics for the broadest range of SoC devices including: graphics processors, RF SoC, cellular RF and digital baseband, power management and audio/video devices. The installation at STATS ChipPAC Test Services provides system access to Silicon Valley’s growing number of fabless companies and offers a gateway to volume production at STATS ChipPAC’s facilities in Asia.

The T2000 is a next generation SoC architecture featuring a loadboard user space more than 5 times larger than competing alternatives and the industry’s most advanced control architecture for the fastest test times, both at today’s multisite levels and for future expanded site counts. Capable of addressing the unique requirements of today’s complex digital MPUs as well as consumer and wireless devices, the T2000 offers superior integration of high-channel density analog, DC and RF instrumentation and the industry’s lowest cost digital instruments from 50Mbps through 6Gbps.

“STATS ChipPAC prides itself on its ability to provide customers with access to advanced test platforms, proven test processes and top notch engineering support. Now, with the addition of Advantest’s T2000 to our US test floor, Bay Area companies can take advantage of the system’s industry-leading test times and parallel efficiency. Our goal is to help our customers turn their test engineering investments into cost advantages as their devices migrate into volume production,” commented Mark Kelley, STATS ChipPAC Test Service’s general manager.

Mark Byars, Advantest’s senior director of U.S. fabless/OSAT sales stated, “Advantest values STATS ChipPAC as a strategic partner worldwide. Whether at probe or final test, the uncompromising efficiency of the T2000 delivers high quality, technologically demanding test flows with volume economics that drive the cost curve across the industry’s broadest range of SoC devices. Together STATS ChipPAC and Advantest deliver a high-confidence, cost-efficient process flow with rapid time-to-volume.”

A formal introduction of the system will take place on December 10, 2009 during a luncheon hosted by Advantest at the STATS ChipPAC Test Services facility. For more information on the event or to reserve a seat at the luncheon, please contact info@advantest.com.

About STATS ChipPAC

STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.

Cautionary Statement with Respect to Forward-Looking Statements

This material contains “forward-looking statements” that are based on Advantest's current expectations, estimates and projections. These statements include, among other things, a discussion of Advantest’s business strategy, outlook and expectations as to market and business developments, production and capacity plans. These forward-looking statements identified by use of forward-looking terminology are subject to known and unknown risks, uncertainties and other factors that may cause Advantest’s actual results, levels of activity, performance or achievements to be materially different from those expressed or implied by such forward-looking statements. These factors include: (i) changes in demand for the products and services produced and offered by Advantest’s customers, including semiconductors, communications services and electronic goods; (ii) circumstances relating to Advantest’s investment in technology, including its ability to develop in a timely fashion products that meet the changing needs of semiconductor manufacturers and communications network equipment and component makers and service providers; (iii) significant changes in the competitive environment in the major markets where Advantest purchases materials, components and supplies for the production of its products or where its products are produced, distributed or sold; and (iv) changes in economic conditions, currency exchange rates or political stability in the major markets where Advantest procures materials, components and supplies for the production of its principal products or where its products are produced, distributed or sold. A discussion of these and other factors which may affect Advantest’s actual results, levels of activity, performance or achievements is contained in the “Operating and Financial Review and Prospects”, “Key Information - Risk Factors” and “Information on the Company” sections and elsewhere in Advantest’s annual report on Form 20-F, which is on file with the United States Securities and Exchange Commission.

Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.