TOKYO, Japan - June 24, 2014 - Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857, NYSE: ATE) has introduced its new T2000 1.6GDM digital module, designed to improve efficiency in testing system-on-chip (SoC) devices on the T2000 test platform.
The 1.6-Gbit-per-second module incorporates a new feature called Functional Test Abstraction Plus (FTA+) to achieve protocol-aware testing, in which the tester communicates directly with the devices under test (DUTs) in each IC's protocol language. A powerful EDA-Link, called FTA-Elink, connects the design simulator to the T2000 test platform directly. In addition, Verilog code can run on the T2000 EPP (Enhanced Performance Package) system with the 1.6GDM module. By equipping the tester's pattern generator with protocol-aware engines capable of independent timing and memory functions, protocol-based I/O can be natively measured, enabling efficient multi-site and concurrent testing. This allows customers to significantly accelerate their design to tape-out for faster time to market.
With the 1.6GDM, the already versatile T2000 EPP can boost its performance to simultaneously test multiple DUTs. The functions of each DUT can be independently monitored and evaluated.
The new module has a vector mode that makes it fully compatible with Advantest's existing 1GDM digital module while offering improved throughput and reliability.
"While the T2000 platform's scalability already provides high return on investment to our customers, this new module gives the tester greater functionality and productivity, which significantly reduces the cost of test," said Dr. Toshiyuki Okayasu, executive officer and executive vice president, SoC Test Business Group at Advantest Corporation.
Shipments of the new T2000 1.6GDM module are expected to begin in August.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.