TOKYO, Japan – December 5, 2018 – Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) announced that a collaboration between the company and Tohoku University’s Center for Innovative Integrated Electronic Systems (below, Tohoku University CIES), led by Tetsuo Endoh (who is also a professor at the Graduate School of Engineering of Tohoku University), has successfully demonstrated operation of a high-writing-speed spin-transfer torque magnetic random access memory (STT-MRAM) using an Advantest memory test system.
In this experiment, researchers measured a 128 Mb density STT-MRAM device developed by the CIES industry-academia collaborative research project "R&D of STT-MRAM aimed at developing non-volatile working memory and its manufacturing technologies” using an Advantest memory test system. The experiment confirmed that high-speed operation of a STT-MRAM device takes 14 nanoseconds at 1.2 V, which is comparable to the voltage used in conventional semiconductor integrated circuits, and at 1.3 V takes 10 nanoseconds, the same as conventional SRAM. This demonstrates the high-speed operation potential of large-capacity STT-MRAM and the effectiveness of high-speed memory performance evaluation technology, which will be indispensable for mass production of STT-MRAM.
The successful experiment was based on joint research by Advantest and the CIES Consortium, and the OPERA (Program on Open Innovation Platform with Enterprises, Research Institute and Academia) program. Advantest and Tohoku University CIES will continue research and development activities aiming to commercialize a new STT-MRAM memory test system equipped with an external magnetic field application mechanism.
The results of this research will be presented at the EEE International Electron Devices Meeting held in San Francisco from 1 to 5 December, 2018.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change.