New T5503HS Test System Provides High Performance with Low Cost of Test in an Upgradeable Design
TOKYO, Japan - February 6, 2014 - Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857, NYSE: ATE) has announced its latest test solution for next-generation memory ICs that enable high-demand mobile applications and servers. With its highly parallel testing capabilities and full compatibility as an upgrade on Advantest's widely used T5503 test platform, the new T5503HS offers industry-leading performance, high productivity and low cost of test within an upgradable design.
As internet-enabled mobile devices and their supporting servers continue to handle larger amounts of data, manufacturers of high-speed, high-capacity memory chips need cost-efficient test solutions that will help them get their newest products to market faster, including emerging DDR4-SDRAM and LPDDR4-SDRAM semiconductors. Advantest's T5503HS system gives memory manufacturers the functionality they need while also reducing their cost of test.
"Our new test system offers the optimal test solution for next-generation DDR4-SDRAMs and LPDDR4-SDRAMs," said Masuhiro Yamada, executive vice president of memory test for Advantest Corporation. "The T5503HS delivers maximum efficiency while also helping our customers to get the most from their capital investments."
Advantest's new system can reach testing speeds of up to 4.5 Gbps, fast enough to handle the 4.266 Gbps maximum operating frequencies of today's most advanced double-data-rate SDRAM semiconductors. To ensure maximum test speeds, the T5503HS automatically generates cyclic redundancy check (CRC) codes and CA parity codes to match the I/O data rates and address of the devices under test. This streamlines the development of new test programs, reducing customers' workloads and improving the time to market for new semiconductor designs.
The T5503HS can perform parallel testing of up to 512 DDR4-SDRAM devices, enabling economical, production-volume testing. In addition, currently installed T5503 testers can be upgraded on site, which extends customers' return on investment (ROI) as next-generation devices are introduced.
Additionally, the tester's real-time source-synchronous function allows it to achieve higher yields and higher throughputs. Incorporated in the system hardware is a timing-training capability that enables the tester to pinpoint solutions faster than conventional systems on today's market, reducing test time in comparison to software-based systems.
Other functions such as individual level settings, I/O dead-band canceling, and data-bus inversion (DBI), which helps to further reduce data-transmission delays, make the T5503HS ideally suited for testing all high-speed memories.
The T5503HSwill be featured in Advantest's exhibit booth at the SEMICON Korea trade show in Seoul, is scheduled to begin shipping to customers in the second quarter of this year.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.