ASIC Maker Will Use Advantest's Tester in Engineering and Production of All Its Semiconductor Products
TOKYO, Japan - July 31, 2013 - Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857, NYSE: ATE) has installed a V93000 Smart ScaleTM tester at HiSilicon Technologies Co., Ltd., a Chinese producer of application-specific integrated circuits (ASICs) and other chipsets for communication networks and digital media, which will use the system in developing and manufacturing ICs for telecommunication networks, wireless terminals, digital media and other mass-market applications. HiSilicon's installation of Smart Scale systems expands its installed base of V93000 testers, making it the primary automatic test equipment (ATE) platform for all of its products.
"In researching competitive testers on the market, we identified the V93000 Smart Scale system as the most capable for testing a broad variety of devices as well as delivering the best performance, the lowest COT (cost of test) and the maximum yield," said Lin Jianjun, testing manager at HiSilicon. "In addition, both HiSilicon and our OSAT (outsourced semiconductor assembly and test) partners put high value on Advantest's service and applications support as we implement this test solution."
With today's semiconductors operating at ever higher speeds, performance and pin counts, test systems must offer greater functionality while maintaining low cost of test. The V93000 Smart Scale platform provides industry-leading scalability and combines the highest speed digital test, precision analog and RF measurement in a single test system. In addition to achieving the lowest-cost solutions for the consumer market, this enables high-end test solutions including protocol communication and data rates of up to 12.8Gbps with 16Gbps in the near future.
The V93000 Smart Scale platform's capabilities and instruments are universally available on all classes of V93000 testers. This allows the use of identical loadboards in engineering and production for different tester configurations, effectively minimizing the cost of test and capital expenditure. Other benefits include optimal asset utilization, faster time to market due to higher engineering efficiency and greater flexibility to quickly answer roadmap uncertainties.
Note: All information supplied in this release is correct at the time of publication, but may be subject to change without warning.