Contribute to productivity improvement for high-end SoC devices by high-heat generation test at die-level
Chiplet technology for high-end SoC devices generates high
computing power. On the other hand, stacking dies
increases the risk of mixing good dies and bad dies and
causes many good dies, substrates, and interposers to be
discarded.
The new HA1200 handler can be linked with
a tester to utilize our unique active thermal control
technology for testing singulated and/or partially
assembled dies. This technology enables testing of
powerful high-end SoCs with 100% test coverage. This helps
reduce yield loss at final test, thus reducing losses of
final multi-die assembled products.
Die-Level Test
Advantest’s new die-level handler allows full device testing, which is typically only available at final test, to be performed before assembly. This minimizes the risk of mixing good and bad dies on stacked dies.
ATC (Active Thermal Control)
For high heat generation during die test, the HA1200 is linked with a tester to test singulated and/or partially assembled dies with our unique active thermal control technology, which has a strong record in package test. This technology extends the flexibility of test items and helps reduce yield loss in final testing of chiplet devices.